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15–40
Chapter 15: Arithmetic Library
For all devices the block can be also configured to operate in 18x18+36 mode, where
first two of three data inputs are multiplied together and added with the third one.
Table 15–60 shows the primary data and controls parameters.
Table 15–60. Primary Data and Controls Parameters
Name
Use Enable Inputs
Use Asynchrounous
Clear Inputs
OR' Asynchrounous
Clear Inputs with Global
Aclr
Bus Type
A input
Register A input(s)
Enable for 'A' Input(s)
Register
B input
Register B input(s)
Enable for 'B' Input(s)
Register
Enable Output Full
Resolution
Output
Register Output
Enable for Output
Register
Enable Systolic
Registers
Value
On or off
On or off
On or off
Unsigned Integer
Signed Integer
Signed Fractional
[1:36/27]
On or off
ENABLE0
ENABLE1
ENABLE2
[1:36/27]
On or off
ENABLE0
ENABLE1
ENABLE2
On or off
[0:72/64 ]
On or off
ENABLE0
ENABLE1
ENABLE2
On or off
Description
Specifies whether any of possible three enable signals (if used later)
should appear as input for the block. Otherwise, the block ties these
signals to ground internally.
Specifies whether block should have dedicated inputs for asynchrounous
clear signals.
Specifies whether the user asynchrounous signals should be OR-ed with
global clear signal before the block uses them. The parameter value is
TRUE by the default.
Type of all data inputs, outputs, and internal values in the block.
Bitwidths for A input busses. For Stratix V devices, the maximum
allowed value is 36; for Arria V and Cyclone V devices it is 27.
Turn on register A input.
Specify enable signal for A inputs register.
Bitwidths for B input busses. For Stratix V devices, the maximum
allowed value is 36; for Arria V and Cyclone V devices it is 27.
Turn on register B input.
Specify enable signal for B inputs register.
Turn on to calculate the resolution of the output based on the input
configuration for the block.
Manually specify the bitwidths for output.
Specify whether the output is registered and enable signal for the output
register.
Turn on systolic registers. This option is available only for
18x18_sum_of_2 mode and turns the block into 18x18_systolic mode.
Table 15–61 shows the input phase structure parameters.
Table 15–61. Input phase Structure Parameters
Name
Value
Description
Turns on input scan chain. Available when input registers are enabled. Turn on
Enable Input Scan Chain On or off
to pass the first data input of the first multiplier to the first inputs of consequent
multipliers.
Use 'scanin' Input
DSP Builder Handbook
On or off
Instead of data input to the first multiplier, the block uses the scanin input,
which you can drive from the scanout of other DSP blocks.
November 2013 Altera Corporation
Volume 2: DSP Builder Standard Blockset
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